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Innovation & Industry
Innovation

Tech Leaders Collaborate On Generative AI For Accelerated Chip Design

News RoomNews RoomNovember 27, 2023No Comments4 Mins Read

Artificial intelligence has been steadily infused into various parts of the Synopsys EDA tool suite for the last few years. What started in 2021 with DSO.ai, a tool created to accelerate, enhance and reduce the costs associated with the place-and-route stage of semiconductor design (sometimes called PnR or floor planning), has been expanded across the company’s complete toolchain, called Synopsys.ai suite, which covers virtually the entire chip development workflow. Despite its numerous successes in recent years, however, Synopsys isn’t done innovating. Last week the company announced a strategic collaboration with Microsoft to deliver what it is calling the Synopsys.ai Copilot, a contextually-aware generative AI (GenAI) tool that assists human design teams via conversational intelligence using natural language.

Industry Leaders Are Already Using Synopsys.ai Copilot

If you missed the previous announcement, the Synopsys.ai Copilot is powered by OpenAI technology running on Microsoft’s Azure on-demand, high-performance cloud infrastructure. Synopsys.ai Copilot is meant to alleviate much of the grunt work required of engineers during RTL generation and verification, similar to the way ChatGPT’s conversational AI capabilities have brought productivity improvements to numerous other industries. Chip designers can effectively ask the Synopsys.ai Copilot questions in plain English, to gain insights into results, produce documentation, or ascertain information about a myriad of other criteria. Today Synopsys revealed that AMD, Intel and Microsoft are already working with the Synopsys.ai Copilot on various designs.

The generative AI of the Synopsys.ai Copilot enables a number of new capabilities. Collaborative tools can offer engineers guidance on everything from design tools to EDA workflows, and it can provide quick analysis of results. The Synopsys.ai Copilot can also expedite development of RTL (register-transfer level abstraction), formal verification assertion creation, UVM test benches, and layout design. Synopsys.ai Copilot will also enable end-to-end workflow creation using natural language across the Synopsys.ai suite.

“As the pioneer of AI-driven chip design, Synopsys is directly addressing engineering productivity during a period of talent shortages by expanding our leading Synopsys.ai suite to include generative AI capabilities across the full stack.” said Shankar Krishnamoorthy, GM of Synopsys EDA Group. “This is an exciting time in the semiconductor industry and Synopsys continues to innovate relentlessly to enable the industry to meet stringent compute and performance-per-watt requirements of end markets.”

The Synopsys.ai Copilot Provides Rapid Responses To Chip Designers

I recently had a conversation with Shankar to learn more about the Synopsys.ai Copilot, and have seen demos of the technology in action. Synopsys.ai Copilot has been trained on vast amounts of design-related data spanning approximately 30 years and it is designed to learn new skills and infer insights from the designer’s environment. The Synopsys.ai Copilot can offer up tables, figures and video related to the conversation and synthesize responses from multiple sources, with full citations. The Copilot also makes it possible to ask questions within the context of Synopsys’ tools, ask further clarifying questions, and even try potential fixes, with responses and results returned quickly. In one example, a designer uncovers a multitude of timing violations in a chip, and the Synopsys.ai Copilot helps guide the designer with the correct workflow to resolve the issues. Videos just posted on the Synopsys website give other examples as well. I highly recommended taking a look to better understand how Synopsys.ai Copilot can assist in the design process.

How the company will roll out the Synopsys.ai Copilot is still being finalized, but the technology will eventually be available for customers whether they leverage Synopsys’ EDA suite on-prem or in the cloud. The goal of these AI-infused EDA tools is multifaceted. Fundamentally, they’re designed to help engineering teams work faster and more efficiently, while ultimately improving the quality of final chip design and products. But they’re also imperative to help alleviate the shortage of engineering talent necessary to address the ever-increasing demand for custom chip designs. In talking with Synopsys and its partners over the last few years, it is clear the tools are doing just that, and the pace at which Synopsys has been able to augments its tool suite with pervasive AI is impressive to say the least.

Read the full article here

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